The present invention relates to a solid-state imaging device, and more particularly, it relates to a CMOS-sensor solid-state imaging device.
A CMOS sensor imaging device, for example, is provided with an image pickup unit (cell unit) that has pixels (unit cells) disposed in a two-dimensional array. The unit cells have an opto-electric converter element which receives incident light and converts it into electric charges and a part which amplifies the electric charges to transmit them. The material for signal wirings (interconnections) to respectively activate the image pickup unit configured of the pixels in a 2D array are generally made of polysilicon (poly-Si) doped with impurities.
However, a resistivity of the polysilicon changes considerably due to various factors such as an impurity doping condition, and is much higher than metal wirings in comparison, e.g., as high as 1.0×10−3 Ωcm.
Thus, pixels located far from a driving circuit (or a driver circuit), which supplies clock pulses to these pixels through the signal wirings, show significant voltage drop at the signal wirings as depicted in FIG. 10, and this prevents there being pulse voltage sufficient to activate the pixels. More specifically, the farther the pixels are from the driver circuit, the more reduced the amplitudes of the clock pulses transferred via the signal wiring, and the more transformed the waves. This in turn causes a problem of reduction of sensitivity in reading the electric charge in the pixels far from the driver circuit. This kind of drawback is defined as “shading”.
To eliminate the drawback, as disclosed in Japanese Unexamined Patent Publication No. H02-5474, there has been an improved arrangement of thicker polysilicon wiring for transmission of clock pulses from a driver circuit to pixels with reduced resistance. In another arrangement, dual driver circuits are located on opposite flanks of an image pickup unit to develop clock pulses to pixels.
However, when increased in thickness, the polysilicon wiring takes up a larger area, which is disadvantageous in miniaturizing the resultant device. Additionally, the arrangement of the dual driver circuits on the opposite sides of the image pickup unit requires occupying an area large enough for two driver circuits, and this also prevents a miniaturization of the chip.